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Shenzhen Res Electronics Limited
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Novia Zhu
E-mail : novia@reselectronics.com.cn
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BOM service integrated circuits Original and new Car ic Logic ICs 74AVC16T245DGG mcu
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Meorient Import & Export Co.LTD
China - Hangzhou
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Hangzhou,Shanghai
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--Product Description
Products Description
Part number | 74AVC16T245DGG |
Description | Logic ICs |
Brand | NXP |
NXP 74AVC16T245DGG Transceiver, 74AVC16T245, 800mV to 3.6V, TSSOP-48
The 74AVC16T245DGG is a 16-bit dual supply Translating Transceiver with configurable bidirectional level voltage translation and
3-state outputs. It has dual supplies for voltage translation and four 8-bit input-output ports each with its own output enable
(nOE) and send/receive (nDIR) input for direction control. VCC(A) and VCC(B) can be independently supplied at any voltage between
0.8 and 3.6V making the device suitable for low voltage translation. A HIGH on nDIR selects transmission from nAn to nBn while a
LOW on nDIR selects transmission from nBn to nAn. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state. The
device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing any
damaging backflow current through the device when it is powered down. In suspend mode when either VCC(A) or VCC(B) are at GND
level, both nAn and nBn are in the high-impedance OFF-state.
.Suspend mode.IOFF circuitry provides partial power-down mode operation.Complies with JEDEC standards.Latch-up performance exceeds
100mA per JESD 78 class II.Inputs accept voltages up to 3.6V
The 74AVC16T245DGG is a 16-bit dual supply Translating Transceiver with configurable bidirectional level voltage translation and
3-state outputs. It has dual supplies for voltage translation and four 8-bit input-output ports each with its own output enable
(nOE) and send/receive (nDIR) input for direction control. VCC(A) and VCC(B) can be independently supplied at any voltage between
0.8 and 3.6V making the device suitable for low voltage translation. A HIGH on nDIR selects transmission from nAn to nBn while a
LOW on nDIR selects transmission from nBn to nAn. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state. The
device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing any
damaging backflow current through the device when it is powered down. In suspend mode when either VCC(A) or VCC(B) are at GND
level, both nAn and nBn are in the high-impedance OFF-state.
.Suspend mode.IOFF circuitry provides partial power-down mode operation.Complies with JEDEC standards.Latch-up performance exceeds
100mA per JESD 78 class II.Inputs accept voltages up to 3.6V
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